commit 806908fbf1edea3f1632e78a03b0b0d47b1ec07e
parent 2e787e6068fbc21faf2f15e9369cf4fa497993ad
Author: Ethan Long <edl@disroot.org>
Date: Sat, 10 Jun 2023 02:05:45 +1000
Some based progress
Diffstat:
3 files changed, 230 insertions(+), 1 deletion(-)
diff --git a/doc/Makefile b/doc/Makefile
@@ -1,2 +1,2 @@
specs.pdf: specs.ms
- groff -mspdf -T pdf specs.ms > specs.pdf
+ groff -t -mspdf -Tpdf specs.ms > specs.pdf
diff --git a/doc/specs.ms b/doc/specs.ms
@@ -1,3 +1,25 @@
+\" Macros used:
+.de AL
+. IP
+. B1
+. KS
+. CW
+.\" Instruction syntax as $1:
+.\" <INST> <CND> <DEST> <TEMP> <TEMP>
+ \\$1
+. sp 0
+.\" Example Usage as $2:
+.\" mul <CND> z x y
+ \\$2
+.\" Representative psuedocode as $3:
+.\" ; z <- CND ? x * y
+. I "; \\$3"
+. KE
+. B2
+. R
+..
+
+\" Document start:
.TL
RemedyVM Specifications
@@ -15,4 +37,211 @@ virtual machine by Bell Labs, and Tsoding's
The instruction set is close to machine code to allow for easy just-in-time (JIT) and ahead-of-time (AOT) compilation.
.AE
+.NH 1
+Instructions & Syntax
+.PP
+All instructions follow the following general pattern:
+.DS I
+.CW
+inst <CND> <DST> <SRC>
+.DE
+Where
+.CW <CND>
+is the condition for the execution of the instruction (see conditionals for more details),
+.CW <DST>
+is the destination temporary, and
+.CW <SRC>
+is the source temporary.
+
+Comments are started with
+.CW ; ' `
+and span to the end of the line, anything past this comment will be ignored by any assembler.
+
+.NH 2
+Conditionals
+.PP
+All instructions support conditionals.
+The list of valid conditionals is as follows:
+.TS
+center doublebox;
+c | c
+= =
+r | l
+- -
+r | l.
+T{
+.B Conditional
+T} T{
+.B Description
+T}
+T{
+.CW eq
+T} If the previous comparison was equal, this condition is true and triggers.
+T{
+.CW neq
+T} If the previous comparison was not equal, this condition is true and triggers.
+.TE
+
+.NH 2
+Memory
+
+.NH 3
+.CW move
+.PP
+The
+.CW move
+instruction copies/moves the value stored in one temporary to another temporary.
+.SH 4
+Usage
+.AL "move <CND> <DST> <SRC>" "move <CND> y x" "y \[<-] <CND> ? x : y"
+
+.NH 3
+.CW swap
+.PP
+The
+.CW swap
+instruction swaps the value stored in one temporary with the value in another temporary.
+.SH 4
+Usage
+.AL "swap <CND> <TEMP1> <TEMP2>" "swap <CND> x y" "if CND { x \[<>] y }"
+
+.NH 3
+.CW push
+.PP
+The
+.CW push
+instruction pushes the specified temporary onto the stack.
+.SH 4
+Usage
+.AL "push <CND> <SRC>" "push <CND> x" "if CND { sp \[<-] sp + size(x), stack \[<-] x : stack }"
+
+.NH 3
+.CW pop
+.PP
+The
+.CW pop
+instruction pops from the top of the stack into the specified temporary.
+.SH 4
+Usage
+.AL "pop <CND> <DEST>" "pop <CND> x" "if CND { sp \[<-] sp - size(x), (x, stack) \[<-] (x, xs) in stack(x:xs) }"
+
+.NH 3
+.CW load
+.PP
+The
+.CW load
+instruction loads data from the memory pointed to by
+.CW <MEMADDR>
+into the specified
+.CW <TEMP> .
+.SH 4
+Usage
+.AL "load <CND> <TEMP> <MEMADDR>" "store <CND> y x" "CND ? y \[<-] Mem(x)"
+
+.NH 3
+.CW store
+.PP
+The
+.CW store
+instruction stores the data from the temporary
+.CW <TEMP>
+into the memory pointed to by
+.CW <MEMADDR> .
+.SH 4
+Usage
+.AL "store <CND> <TEMP> <MEMADDR>" "store <CND> y x" "CND ? Mem(x) \[<-] y"
+.B NOTE:
+the order of the store instruction is reversed to the regular load & other typical instructions.
+
+
+.NH 2
+Arithmetic
+
+.NH 3
+.CW add
+.PP
+The
+.CW add
+instruction adds two temporaries and puts the result in a third.
+.SH 4
+Usage
+.AL "add <CND> <DEST> <TEMP> <TEMP>" "add <CND> z x y" "z \[<-] CND ? x + y"
+
+.NH 3
+.CW sub
+.PP
+The
+.CW sub
+instruction subtracts
+.CW <TEMP1>
+from
+.CW <TEMP2>
+and puts the result in
+.CW <DEST> .
+.SH 4
+Usage
+.AL "sub <CND> <DEST> <TEMP1> <TEMP2>" "sub <CND> z x y" "z \[<-] CND ? x \[-] y"
+
+.NH 3
+.CW mul
+.PP
+The
+.CW mul
+instruction multiplies two temporaries together, putting the result in
+.CW <DEST> .
+.SH 4
+Usage
+.AL "mul <CND> <DEST> <TEMP> <TEMP>" "mul <CND> z x y" "z \[<-] CND ? x \[mu] y"
+
+.NH 3
+.CW div
.PP
+The
+.CW div
+instruction divides
+.CW <TEMP1>
+from
+.CW <TEMP2>
+and puts the result in
+.CW <DEST> .
+.SH 4
+Usage
+.AL "div <CND> <DEST> <TEMP1> <TEMP2>" "div <CND> z x y" "z \[<-] (CND && y \[!=] 0) ? x \[di] y"
+.B NOTE:
+if
+.CW <TEMP2>
+is 0, the instruction will act as a
+.CW nop ,
+as well as set the
+.CW dz
+condition.
+This will need to be checked against at runtime after any division with unknown divisor.
+
+
+.NH 2
+Bit Manipulation & Logical Operations
+
+.NH 3
+.CW shiftl
+
+.NH 3
+.CW shiftr
+
+.NH 3
+.CW and
+
+.NH 3
+.CW or
+
+.NH 3
+.CW xor
+
+.NH 3
+.CW not
+
+
+.NH 2
+Control Flow
+
+.NH 3
+.CW jump
diff --git a/doc/specs.pdf b/doc/specs.pdf
Binary files differ.
